Chips JU

The Chips Joint Undertaking (JU) supports research, development, innovation, and manufacturing capacities in the European semiconductor ecosystem.

The Chips Joint Undertaking (Chips JU) is the European Union’s flagship public-private partnership supporting research, innovation, and capacity building in the semiconductor and Electronic Components & Systems (ECS) ecosystem. Established under the European Chips Act, which entered into force on 21 September 2023, the Chips JU strengthens Europe’s technological sovereignty and resilience in semiconductors. With nearly €11 billion in combined public and private investments (2023–2027), it is one of the most strategic funding instruments for Europe’s microelectronics ecosystem.

Two Complementary Funding Pillars

The Chips JU implements two distinct but complementary types of activities under the R&I ECS calls and C4EU (Chips for Europe) initiative.

ECS Calls – Research & Innovation

These calls continue the long-standing collaborative R&I activities previously implemented under the Key Digital Technologies Joint Undertaking (KDT JU) and before that ECSEL Joint Undertaking. They are often referred to as “non-Initiative” calls.

Key characteristics:

What they fund:

  • Collaborative research & innovation projects

  • Technology development across the full ECS value chain

  • Application-driven innovation in automotive, industrial, health, energy, mobility, digital infrastructure and more

  • Integration of semiconductor technologies into smart systems

These calls ensure continuity of Europe’s strong collaborative innovation ecosystem.

More information here. 

Chips for Europe Initiative (C4EU) – Capacity Building

The second pillar of the Chips JU implements the Chips for Europe Initiative (C4EU), which is the capacity-building arm of the European Chips Act.

This part goes beyond research: it builds strategic technological infrastructure and skills across Europe. It includes Pilot Lines, Design Platform, and Competence Centres Network.

Pilot Lines & EU Chips Design Platform

Pilot Lines are large-scale, advanced technological platforms enabling:

  • Testing and validation of new semiconductor technologies

  • Bridging the gap between lab research and industrial manufacturing

  • Access to cutting-edge infrastructure for European companies

They focus on strategic technologies such as Advanced nodes, FD-SOI, Heterogeneous integration, Power electronics, Quantum chips. These infrastructures strengthen Europe’s industrial competitiveness and reduce dependency on non-EU manufacturing.

Under the Chips Joint Undertaking, five concrete Pilot Lines have been launched to strengthen Europe’s semiconductor capacities:

1. NanoIC (advanced sub-2nm technologies)

2. FAMES (FD-SOI ultra-low-power technologies)

3. APECS (advanced packaging and heterogeneous integration)

4. WBG Pilot Line (wide band gap power electronics based on SiC and GaN)

5. PIXEurope (photonic integrated circuits)

Complementing the Pilot Lines, the EuroCDP (EU Chips Design Platform) is the pan-European design infrastructure funded under the Chips Joint Undertaking, providing SMEs, start-ups and fabless companies with access to advanced EDA tools, IP libraries, cloud-based design environments and streamlined pathways to European pilot lines and manufacturing. Coordinated by imec and implemented by a European consortium of leading research and technology organisations, EuroCDP lowers entry barriers, bridges the gap from chip concept to industrial production, and strengthens Europe’s semiconductor design ecosystem.

Competence Centers

Under the Chips for Europe Initiative, a structured European network of 30 national Chips Competence Centres has been established across all 27 EU Member States plus Norway (28 countries in total) as of February 2026.

These centres act as national semiconductor hubs, ensuring that Europe’s technological investments translate into real industrial deployment. They provide:

  • Support to SMEs, start-ups and mid-caps

  • Access to technical expertise and semiconductor infrastructure

  • Training and advanced skills development

  • Guidance for technology uptake and innovation scaling

  • Direct connections to European Pilot Lines and the EU Chips Design Platform

By anchoring advanced semiconductor capabilities at national level while connecting them to European infrastructures, the Competence Centres ensure balanced ecosystem development across Europe.

More information about your Competence Centres in this document.

The role of AENEAS in the Chips JU 

AENEAS is one of the three Industry Associations (together with EPoSS and INSIDE) partnering in the Chips Joint Undertaking alongside the European Commission and the Participating States, representing research, development and innovation actors across the full ECS value chain — from large industry players and SMEs to RTOs and universities.

Through its voting seat in the Chips JU Governing Board, AENEAS actively contributes to defining strategic priorities, shaping the Work Programme and ensuring that funding conditions and call topics reflect real industrial and technological needs. By aligning the ECS Strategic Research and Innovation Agenda with the implementation of both collaborative ECS Calls and the Chips for Europe capacity-building actions, AENEAS helps maintain a strong, innovation-driven and globally competitive European semiconductor ecosystem.

For AENEAS members, the Chips JU provides access to strategic European funding, participation in high-impact collaborative projects, influence over future technology roadmaps, and direct entry points to Pilot Lines, the EU Chips Design Platform and the network of Competence Centres.

AENEAS supports its members throughout the full funding lifecycle — from strategic positioning and consortium building to proposal preparation and successful project participation — ensuring they are well placed within Europe’s semiconductor sovereignty strategy.

Chips JU logo


Chips JU Calls

The Chips JU opens yearly calls according to the Work Programme and based on the ECS SRIA.

More information about opened and upcoming calls here

Chips JU Contacts

Chips JU
White Atrium Building
Avenue de la Toison d’Or 56-60
1060 Brussels
Belgium



  • +32 2 221 81 02


  • enquiries@kdt-ju.europa.eu